EECS 229 Low Power SoC Design (2017-2018)

EECS 229 Low Power SoC Design

(Not required for any major.)
Catalog Data:

EECS 229 Low Power SoC Design (Credit Units: 4) From an inverter to server centers, low-power design theory and practice in modern systems-on-chip (SoC), energy efficient design time and runtime methods are surveyed at circuit, RTL, and architecture levels. Lab assignments will help students quantify tradeoffs and design practices. Prerequisite: EECS 217. Graduate students only. (Design units: 0)

Required Textbook:
. Edition, , 1969, ISBN-13 978-0387717128.

Recommended Textbook:
None
References:
  • SystemC: From The Ground Up, David C. Black et al. (eBook freely available through UCI libraries)
  • System Design with SystemC, Thorsten Grötker et al.
  • Digital Design of Signal Processing Systems: A Practical Approach, Shoab Ahmed Khan (eBook freely available through UCI libraries)
  • SystemVerilog For Design, Stuart Sutherland et al.
  • SystemVerilog For Verification, Chris Spear 8 Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime, Himanshu Bhatnagar
Coordinator:
Fadi Kurdahi
Relationship to Student Outcomes
No student outcomes specified.
Course Learning Outcomes. Students will:
Prerequisites by Topic

VLSI (EECS 119) or Knowledge of algorithms and data structures.

Lecture Topics:
  • MOS Transistor Models
  • Power and Energy Basics
  • Optimizing Power @ Design Time: Circuits
  • Optimizing Power @ Design Time: Architecture
  • Optimizing Power @ Design Time: Interconnect
  • Optimizing Power @ Design Time: Memory
  • Optimizing Power @ Standby: Circuits and Systems
  • Optimizing Power @ Standby: Memory
Class Schedule:

Meets for 3 hours of lecture each week for 10 weeks.

Computer Usage:

CAD tools used: Synopsys Design Compiler, Power complier and System-C simulator

Laboratory Projects:

One each week.

Professional Component
Design Content Description
Approach:
Lectures:
Laboratory Portion: 0%
Grading Criteria:
  • Homework: 30%
  • Quizzes: 30%
  • Final Project: 40%
  • Total: 100%
Estimated ABET Category Content:

Mathematics and Basic Science: 0.0 credit units

Computing: 0.0 credit units

Engineering Topics: 0.0 credit units

Engineering Science: 0.0 credit units

Engineering Design: 0.0 credit units

Prepared:
February 22, 2017
Senate Approved:
November 10, 2014
Approved Effective:
2015 Fall Qtr