EECS 222A System-on-Chip Description and Modeling (2012-2013)

EECS 222A System-on-Chip Description and Modeling

(Not required for any major.)
Catalog Data:

EECS 222A System-on-Chip Description and Modeling (Credit Units: 4) Computational models for System-on-Chip (SoC). System-level specification and description languages and execution semantics. Concepts, requirements, examples. SoC modeling at different levels of abstratiob. Modeling of IP(intellectual property), design constraints, test benches. Simulation semantics and algorithms. Co-simulation methodology. (Design units: 0)

Required Textbook:
. Edition, , 1969, ISBN-13 978-0792373872.

Recommended Textbook:
Rainer Doemer
Relationship to Student Outcomes
No student outcomes specified.
Course Learning Outcomes. Students will:
Prerequisites by Topic


Lecture Topics:
  • SoC concepts, abstraction levels, computational models
  • The SpecC system-level description language
  • SoC specification, modeling guidelines, validation
  • Execution and simulation semantics
  • Top-down SoC design methodology
  • SoC architecture modeling
  • SoC communication modeling
  • SoC cycle-accurate modeling, implementation
  • The SystemC system-level description language
  • UML and other system-level description languages
Class Schedule:

Meets for 3 hours of lecture each week for 10 weeks.

Computer Usage:

SLDL simulation and debugging tools.

Laboratory Projects:


Professional Component


Design Content Description


Laboratory Portion:
Grading Criteria:
  • Homework assignments 50%
  • Final Project/Final Exam 50%
  • Total: 100%
Estimated ABET Category Content:

Mathematics and Basic Science: 0.0 credit units

Computing: 0.0 credit units

Engineering Topics: 0.0 credit units

Engineering Science: 0.0 credit units

Engineering Design: 0.0 credit units

April 18, 2012
Senate Approved:
February 2, 2012
Approved Effective:
2012 Fall Qtr