EECS 170B Electronics II (2016-2017)

EECS 170B Electronics II

(Required for CpE and EE. Selected Elective for MSE.)
Catalog Data:

EECS 170B Electronics II (Credit Units: 4) Design and analysis of single-stage amplifiers, biasing circuits, inverters, logic gates, and memory elements based on CMOS transistors. Corequisite: EECS170LB. Prerequisite: EECS70B, EECS170A, EECS170LA. Computer Engineering, Electrical Engineering, and Materials Science Engineering majors have first consideration for enrollment. (Design units: 2)

Required Textbook:
. Edition, , 1969, ISBN-13 978-0195323030.

Recommended Textbook:
Stuart Kleinfelder
Relationship to Student Outcomes
No student outcomes specified.
Course Learning Outcomes. Students will:

1. Describe the large signal and small signal transistor models for theMOSFET and its dependence on transistor parameters and biasing condition.

2. Solve the D.C. conditions of transistor circuits and current mirrors.

3. Calculate voltage gain, input resistance and output resistance of single stage MOSFET amplifiers in various configurations.

4. Describe the characteristics of the CMOS inverter such as noise margins,propagation delay, power dissipation and extension to CMOS logic gates.

5. Describe Pass Transistor Logic, Dynamic logic and basic Read/Write ofSRAM and DRAM semiconductor memory.

Prerequisites by Topic
  • Understanding of electric circuit analysis.
  • Understanding basic semiconductor device principles.
  • Modeling and analysis of electrical networks.
  • Basic network theorems.
  • Sinusoidal steady state and transient analysis of RLC networks and theimpedance concepts.
  • Properties of semiconductors, electronic conduction in solids, physics andoperation principles of semiconductor devices such as diodes, transistors,transistor amplifiers and transistor equivalent circuits.
Lecture Topics:

The lecture covers the essential device characteristics of NMOS transistors, and the basic MOS amplifier configurations, CMOS current source, high frequency MOSFET model, CMOS inverter, CMOStransmission gate, CMOS logic gates, Pass transistor logic, dynamic logic,S-R flip flop, and semiconductor memory such as SRAM and DRAM.

Class Schedule:

Meets for 3 hours of lecture and 1 hour of discussion each week for 10 weeks.

Computer Usage:


Laboratory Projects:


Professional Component

Contributes toward the Computer Engineering Topics Courses andElectrical Engineering Topics Courses and Major Design experience.

Design Content Description

Approach: The course material is oriented towards problem solving and design oriented.This is reflected in the choice of lecture material, examples and homework. Essential concepts are illustrated through a problem solving approach using examples with designflavor. The lecture materials are closely related to the laboratory simulation using PSPICE,Magic Layout tool, and hand on labs.

Lectures: 100%
Laboratory Portion: 0%
Grading Criteria:

Home work and/or quizzes: 10%

2 Midterm exams at 25% each: 50%

Final exam: 40%


Estimated ABET Category Content:

Mathematics and Basic Science: 0.0 credit units

Computing: 0.0 credit units

Engineering Topics: 4.0 credit units

Engineering Science: 2.0 credit units

Engineering Design: 2.0 credit units

July 12, 2016
Senate Approved:
April 29, 2013
Approved Effective:
2013 Fall Qtr