EECS 117 Parallel Computer Systems (2016-2017)

EECS 117 Parallel Computer Systems

(Not required for any major. Selected Elective for CSE and CpE.)
Catalog Data:

EECS 117 Parallel Computer Systems (Credit Units: 3) General introduction to parallel computing focusing on parallel algorithms and architectures. Parallel models: Flynn's taxonomy, dataflow models. Parallel architectures: systolic arrays, hypercube architecture, shared memory machines, dataflow machines, reconfigurable architectures. Parallel algorithms appropriate to each machine type area also discussed. Prerequisite: EECS20 and EECS112/CSE132. Computer Engineering and Computer Science and Engineering majors have first consideration for enrollment. (Design units: 1)

Required Textbook:
. Edition, , 1969, ISBN-13 978-1558603431.

Recommended Textbook:
None
References:
None
Coordinator:
Jean-Luc Gaudiot
Relationship to Student Outcomes
No student outcomes specified.
Course Learning Outcomes. Students will:

1. Develop the capability to study the complexity of the problem of parallel processing, from high-level language programming to low-level implem-entation of synchronization principles.

2. Develop a working knowledge of the design of shared-memory systems, with a particular emphasis on cache coherence mechanisms and memory consistency.

3. Describe the design of modern interconnection networks.

4. Develop an in-depth understanding of message-passing concepts and modern multiprocessor systems.

5. Develop the knowledge of new models such as functional programming, data-flow execution, reconfigurable architectures, etc.

Prerequisites by Topic
  • Familiarity with building blocks and organization of digital computers.
  • Knowledge of the arithmetic, control and memory units, and input/out devices.
  • Advanced programming concepts for system software including data types, points, recursion, and modules.
Lecture Topics:
  • Flynn’s taxonomy.
  • Dataflow models.
  • Interconnection networks.
  • Message-passing multiprocessors.
  • Shared memory machines.
  • Dataflow machines.
  • Reconfigurable architectures.
  • Vector processors.
Class Schedule:

Meets for 3 hours of lecture each week for 10 weeks.

Computer Usage:

None.

Laboratory Projects:

None.

Professional Component

Contributes toward the Computer Engineering Topics courses and Major design experience.

Design Content Description
Approach:

The architecture principles studied in this class are firmly based upon an array of technological and basic design principles.

Lectures: 100%
Laboratory Portion: 0%
Grading Criteria:
  • Home work assignments: 25%
  • Midterm exam: 30%
  • Final exam: 45%
  • Total: 100%
Estimated ABET Category Content:

Mathematics and Basic Science: 0.0 credit units

Computing: 3.0 credit units

Engineering Topics: 3.0 credit units

Engineering Science: 2.0 credit units

Engineering Design: 1.0 credit units

Prepared:
July 12, 2016
Senate Approved:
April 29, 2013
Approved Effective:
2013 Fall Qtr