EECS 112 Organization of Digital Computers (2013-2014)

EECS 112 Organization of Digital Computers

(Required for CpE. Selected Elective for EE.)
Catalog Data:

EECS 112 Organization of Digital Computers (Credit Units: 4) Building blocks and organization of digital computers, the arithmetic, control, and memory units, and input/out devices and interfaces. Microprogramming and microprocessors. Prerequisite: EECS31L/CSE 31L. Computer Engineering, Computer Science and Engineering, and Electrical Engineering majors have first consideration for enrollment. Same as CSE 132. Only one course from EECS 112, CSE 132, COMPSCI 152 may be taken for credit. (Design units: 4)

Required Textbook:
. Edition, , 1969, ISBN-13 978-0123747501.

Recommended Textbook:
Nader Bagherzadeh
Relationship to Student Outcomes
This course relates to Student Outcomes: CAC a, CAC b, CAC c, CAC i, CAC j, EAC a, EAC b, EAC c, EAC e, EAC i, EAC j, EAC k.
Course Learning Outcomes. Students will:

1. Have a working knowledge of computer systems, their basic organization and components. (CAC a, CAC i, EAC a, EAC i, EAC j)

2. Have a working knowledge of the inner-working of computers, their evolution and trade-offs affecting their performance. (CAC a, CAC c, CAC j, EAC a, EAC c, EAC j)

3. Develop experience with the design process in the context of computer hardware (CAC a, CAC c, CAC i, CAC j, EAC a, EAC c, EAC e, EAC i, EAC j, EAC k)

4. Possess the capability to analyze the performance of computer systems and their limitations. (CAC a, CAC b, CAC c, CAC i, EAC a, EAC b, EAC c, EAC e, EAC i, EAC k)

Prerequisites by Topic
  • Introduction to common digital integrated circuits: gates, memory circuits, MSI components.
  • Operating characteristics, specifications, and applications.
  • Design of simple combinational and sequential digital systems.
  • Construction and debugging techniques, using CAD tools and breadboards.
Lecture Topics:
  • Introduction to computer systems and performance evaluation. (week 1 & 2)
  • Machine language and computer arithmetics, Chapters 3 and 4. (week 3 & 4)
  • Midterm 1: Processor design; control and data path, Chapter 5. (week 5 & 6)
  • Pipelining, Chapter 6. (week 7 & 8)
  • Memory design, Chapter 7. (week 9 & 10)
Class Schedule:

Meets for 3 hours of lecture and 1 hour of discussion each week for 10 weeks.

Computer Usage:

Personal computer

Laboratory Projects:


Professional Component

Contributes toward the Computer Engineering and Computer Science and Engineering Topics Courses and Major Design experiences.

Design Content Description

The design content of this course is based on the time spent designing CPU architecture; pipeline design and hazard management; RTL design of the micro architecture for a basic microprocessor including the instruction set architecture; and memory management subsystem design and analysis.

Lectures: 0%
Laboratory Portion: 100%
Grading Criteria:
  • Midterm Exam: 30%
  • Homework & Pop Quizzes: 30%
  • Final Exam: 40%
  • Total: 100%
Estimated ABET Category Content:

Mathematics and Basic Science: 0.0 credit units

Computing: 4.0 credit units

Engineering Topics: 4.0 credit units

Engineering Science: 0.0 credit units

Engineering Design: 4.0 credit units

May 29, 2013
Senate Approved:
January 28, 2013
Approved Effective:
2013 Fall Qtr