# CSE 70A Network Analysis I (2013-2014)

#### CSE 70A Network Analysis I

**CSE 70A Network Analysis I (Credit Units: 4)** Modeling and analysis of electrical networks. Basic network theorems. Sinusoidal steady state and transient analysis of RLC networks and the impedance concept. Corequisite: Mathematics 3D. Prerequisite: Physics 7D; EECS10, MAE10, EECS12, CSE41, or ICS 31. Aerospace Engineering, Biomedical Engineering, Civil Engineering, Computer Engineering, Electrical Engineering, Materials Science Engineering, and Mechanical Engineering have first consideration for enrollment. Same as EECS 70A. Only one course from CSE 70A, EECS 70A, ENGRMAE 60 may be taken for credit. (Design units: 1)

- Johnson, D. E., Johnson J. R., Hilburn, J. L. and Scott, P.D., Electric Circuit Analysis, 3rd edition, Wiley, 1999.
- Nilsson, J.W., Riedel, S.A. Electric Circuits, 8th edition, Prentice Hall, 2007.

1. Use mathematical tools for analyzing linear RLC circuits. (CAC a, EAC a)

2. Describe the basic network theorems. (CAC a, EAC a)

3. Describe the concepts of complete response and transient response of linear RLC circuits. (CAC a, EAC a)

- Understanding differential equations
- Understanding of physics of electric networks.
- Understanding of computational methods.

This course is aimed at the basic network theorems (Thevenin, Norton, nodal analysis, mesh analysis, transient response, complete response, and superposition) to analyze first and second order liner RLC circuits.

Meets for 3 hours of lecture and 1 hour of discussion each week for 10 weeks.

The student is required to use PSPICE circuit simulation software and a scientific calculator for all the calculations in this class.

None.

Contributes toward the Computer Engineering, Biomedical Engineering, Computer Science and Engineering, Mechanical Engineering, and the Materials Science Engineering, Topics Courses and the Electrical Engineering Topics Courses and Major Design experience.

Three weeks of this course are devoted to elementary design of linear circuits. In particular, time is devoted to (a) the design of voltage and current dividers, (b) the design of basic operational amplifier circuits, including voltage followers, summers, and inverting summers, and (c) the design of basic RLC networks. Homework: 50%.

- 8 Problem sets: 10%
- 2 Midterm exams: 60%
- Comprehensive Final Exams: 30%
- Total: 100%

Mathematics and Basic Science: 0.0 credit units

Computing: 0.0 credit units

Engineering Topics: 4.0 credit units

Engineering Science: 3.0 credit units

Engineering Design: 1.0 credit units