CSE 112 Electronic Devices and Circuits (2013-2014)

CSE 112 Electronic Devices and Circuits

(Required for CSE.)
Catalog Data:

CSE 112 Electronic Devices and Circuits (Credit Units: 4) A first course in the design of Very Large Scale Integrated (VLSI) systems. Introduction to CMOS technology: MOS transistors and CMOS circuits. Analysis and synthesis of CMOS gates. Layout design techniques for building blocks and systems. Introduction to CAD tools. Prerequisite: Physics 7D; CSE70A/EECS70A. Only one course from CSE 112, EECS 119, EECS 170D, EECS 119, EECS 170D may be taken for credit. (Design units: 4)

Required Textbook:
. Edition, , 1969, ISBN-13 978-0072460537.

Recommended Textbook:
None
References:

Weste and Eshraghian, Principles of CMOS VLSI, 2nd Edition, Addison-Wesley, 1994.

Coordinator:
Fadi Kurdahi
Relationship to Student Outcomes
This course relates to Student Outcomes: CAC a, CAC c, CAC j, EAC a, EAC b, EAC e, EAC k.
Course Learning Outcomes. Students will:

1. Understand MOS transistors. (EAC a)

2. Be able to design basic CMOS gates. (CAC a, EAC a)

3. Design circuits that perform combinational and sequential functions and analyze their performance when implemented in ICs. (CAC a, CAC c, CAC j, EAC a, EAC b, EAC e, EAC k)

4. Design VLSI layouts, analyze, and optimize or tradeoff their quality metrics given a set of constraints. (CAC a, CAC c, CAC j, EAC a, EAC b, EAC e, EAC k)

Prerequisites by Topic
  • Calculus: First order differential equations;
  • College physics: Mechanics, waves, electromagnetics, and quantum physics;
  • College chemistry: General bonding theory and co-valent bonding;
  • Circuit theory: RLC circuits, transfer function, impulse response, node and loop equations.
  • Building blocks and organization of digital computers
  • Arithmetic, control and memory units
  • Circuit analysis
Lecture Topics:
  • Introduction to semiconductor electronics
  • MOS transistors
  • Inverter, Static CMOS and Dynamic CMOS.
  • Combinational Logic Design. Design of Sequential Circuits.
  • Design of Arithmetic Building Block
  • Timing Issues.
Class Schedule:

Meets for 3 hours of lecture and 1 hour of discussion each week for 10 weeks.

Computer Usage:

MAGIC, IRSIM, SPICE (or equivalent)

Laboratory Projects:

Spice simulation, layout for inverter, layout for basic gates, layout for adder.

Professional Component

Contributes towards the Computer Science and Engineering major requirements for Engineering Topics courses.

Design Content Description
Approach:

Study of devices; NMOS and PMOS; design of: Inverter, Combinational, ALU.

Lectures: 50%
Laboratory Portion: 50%
Grading Criteria:
  • Homework: 10%
  • Projects: 35%
  • Midterm Exam: 25%
  • Final Exam: 30%
  • Total: 100%
Estimated ABET Category Content:

Mathematics and Basic Science: 0.0 credit units

Computing: 0.0 credit units

Engineering Topics: 4.0 credit units

Engineering Science: 0.0 credit units

Engineering Design: 4.0 credit units

Prepared:
November 8, 2013
Senate Approved:
January 10, 2012
Approved Effective:
2012 Fall Qtr